Test engineering research and development (R&D) projects can utilize our vast expertise in this field. We have been and are involved in Phase I and Phase II Small Business Innovative Research (SBIR) projects.

Navy SBIR (N162-106) Advanced High-Speed Bus Technologies for Units Under Test (UUT), Test and Evaluation

Hi-SPINOUT (High-Speed Input/Output Test), a high-speed device interface implemented on a state-of-the-art field programmable gate array (FPGA) to support tests in the multi-Gbps range

• Employs dynamically reconfigurable synthetic instruments (SIs) under the control of the test program set (TPS) developer
• High-speed tests, such as serialization and deserialization (SerDes) tests, are applicable for many different high-speed buses
• Hi-SPINOUT can test in Gbps environments and can add high speed capabilities to legacy (military) ATE, which expands the useful life of the ATE
• Hi-SPINOUT is ATE-agnostic, so tests can be shared across service platforms
• Test reuse, facilitated by this technology will save millions in future TPSs
• Entire TPSs can be employed by other TPSs for wider test reuse

Hi-SPINOUT solves many test challenges:

• Reduces lead times via TPS reuse
• Reduces TPS development cost
• Provides legacy ATE with updates to test high-speed circuits

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