Testability Director
The Testability DirectorTM
Version 3.3
One Low Price for use by All your Test and Design Engineers
Facility Wide License Only $1,999.50
Includes: The Tutorial ($99.95) and The Detailed User’s Manual ($299.95).
Also available for purchase separately
Design for Testability is an excellent way to cut your test costs – providing returns on your investment which can exceed several hundred percent. Now, with The Testability Director you will know exactly what to do to make your product more testable and maintainable.
What is The Testability Director?
The Testability Director is a spreadsheet template, which guides in the development of testable designs. It contains the Inherent Testability Checklist used with MIL-STD-2165, the U.S. Government’s Testability Program for Electronic Systems and Equipments. But The Testability Director goes much further, bringing you hundreds of guidelines from IC design through board and system testing. It includes guidelines for X-ray and Automated Optical Inspection. It also includes fixturing guidelines for bed-of nails, flying probe and even vectorless test approaches. Developed by world renown experts on testability, it includes both digital and analog guidelines and spans from manufacturing through support. It is dynamic, allowing you to add criteria which may be specific to your needs. The Overall Testability Score Sheet and Section Weight Assignment table below shows a sample page from The Testability Director. This table is a compilation of similar tables for individual criteria behind each row (that are not shown here).
What type of criteria do we score?
You don’t need any sophisticated testability formula, nor a detailed circuit analysis. You answer some simple questions about your design and let the spreadsheet program calculate your Overall Testability Score.
How does it work?
The Testability Director provides hundreds of very specific testability design guidelines in the form of questions called criteria. A Criteria Weight is assigned to each criterion. A Score in Percent is calculated by dividing those Meeting Criteria with the Total Number. From these figures, The Testability Director automatically calculates a Weighted Score. Criteria are grouped in sections, with each section having its own Assigned Section Weight. Major sections include the following:
General
IC and ASIC Level
Board Level
Inspection
Connectivity
In-Circuit
Functional
System Level
Any criterion, subsection or section can be ignored by assigning it a 0 Weight. An Overall Testability Score takes into account all criteria and a score of 90% or more indicates good testability. A low score for any criterion indicates that improvement is needed. The Users’ Manual, provided with the software, gives suggestions on how to improve the design. Version 3.3 includes a hypertext Users’ Manual for easier browsing.
Who should use The Testability Director and how?
The Testability Director is best used as a cooperative effort between a number of disciplines: Test Engineers, Design Engineers, Manufacturing Engineers, Maintainability and other Logistics personnel and Management. The Testability Director can provide a bridge between these fields. Here is our recommended method to accomplish this integration as three separate activity:
1. Have Management assign the Section Weight
2. Have Design Engineers, answer to what extent each criterion is met. (Total Number and Meeting Criteria).
3. Have Test Engineers, assign each Criteria Weight and give non-applicables a 0 weight.
Steps 2 and 3 can be interchanged.
This procedure has the advantage that it is quick because each discipline deals with questions they have expertise in. Managers know what tests are most important, Designers know the intimate details of their design, Test Engineers know how each criterion affects overall testability.
The entire process takes a few hours including revisits of criteria as the design changes.
What is included with my order?
The Testability Director, includes your spreadsheet template in Excel(TM), which can readily be imported into most other spreadsheet programs. The software includes a Tutorial and an extensive Detailed Users’ Manual which gives guidelines for each criterion. The Detailed Users’ Manual is also included in hypertext, allowing you to use any (Internet) browser to quickly find any criteria you are looking for.
* License is for a single facility. A company-wide multi-facility licensing may be ordered at a later time. Californians add sales tax. No shipping charge for pay-per-download.
Risk FREE Guarantee: Satisfaction Guaranteed
Our software products, The Testability Director and The Test Flow Simulator carry a special guarantee. If you are dissatisfied with the software and don’t want to keep it, send us a FAX to 310-305-7703 on your company stationary within 30 days of your purchase that you did not make or keep any copies, and we will refund the entire amount you paid.
Support and Updates?
Free updates and telephone support for one year is available for only $399.50.
Overall Testability Score Sheet and Section Weight Assignment
| Assigned Section Weight |
Section Score in Percent |
Section Weight |
Section Weighted Score |
||
| G00000 | General Guidelines | 10 | 12% | 720.0 | 86.4 |
| I00000 | IC and ASIC Level Testability Guidelines | ||||
| I10000 | VLSI, ASIC and Microprocessor Circuit Guidelines | 8 | 80% | 1368.0 | 1098.1 |
| I30000 | Memory and Programmable Circuit Guidelines | 6 | 85% | 450.0 | 383.5 |
| I50000 | Structured Design for Testability Guidelines | 9 | 62% | 432.0 | 266.2 |
| B00000 | Board Level Testability Guidelines | ||||
| B10000 | Inspection | ||||
| B11000 | Automatic Optical Inspection Guidelines | 6 | 78% | 480.0 | 373.7 |
| B13000 | Automated X-Ray Guidelines | 8 | 86% | 320.0 | 240.5 |
| B30000 | Connectivity Guidelines | ||||
| B31000 | Flying Probe Connectivity Guidelines | 6 | 93% | 102.0 | 94.8 |
| B33000 | Vectorless Test Guidelines | 7 | 81% | 259.0 | 208.6 |
| B35000 | Boundary-Scan Connectivity Guidelines | 9 | 76% | 99.0 | 75.4 |
| B50000 | In-Circuit Board Testability Guidelines | ||||
| B51000 | In-Circuit Test and Testability Guidelines | 8 | 89% | 1712.0 | 1522.9 |
| B53000 | Boundary-Scan In-Circuit Testability Guidelines | 8 | 77% | 352.0 | 271.3 |
| B70000 | Functional Board Test and Testability Guidelines | ||||
| B71000 | Digital Circuit Guidelines | 7 | 93% | 1575.0 | 1460.7 |
| B73000 | Analog Circuit Guidelines | 5 | 88% | 325.0 | 285.8 |
| B75000 | Board Level Boundary-Scan and BIT Guidelines | 7 | 88% | 630.0 | 552.4 |
| S00000 | System Level Testability Guidelines | ||||
| S01000 | General System Level Guidelines | 8 | 85% | 640.0 | 543.8 |
| S03000 | System Level BIT Guidelines | 8 | 89% | 952.0 | 850.3 |
| Totals | 10416.0 | 8314.2 | |||
| Overall Testability Score |
80% |
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